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The SuperSPARC microprocessor
By: Blanck, G.; Krueger, S.;
1992 / IEEE / 0-8186-2655-0
This item was taken from the IEEE Periodical ' The SuperSPARC microprocessor ' The SuperSPARC microprocessor is a highly integrated, high-performance superscalar SPARC version 8 compatible microprocessor. The authors provide an overview of its internal operation and capabilities. The processor contains an integer unit, a double precision floating point unit, fully consistent instruction and data caches, a SPARC reference memory management unit and a dual-mode bus interface supporting either the SPARC standard MBUS or an interface optimized for connection to a companion second-level cache controller chip. The chip is constructed using Texas Instruments 0.8- mu triple-layer metal BiCMOS technology.<
Metal Bicmos Technology
High-performance Superscalar Sparc Version 8 Compatible Microprocessor
Double Precision Floating Point Unit
Fully Consistent Instruction
Dual-mode Bus Interface
Sparc Standard Mbus
Second-level Cache Controller Chip
Sparc Reference Memory Management Unit