Your Search Results

Use this resource - and many more! - in your textbook!

AcademicPub holds over eight million pieces of educational content for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

The SuperSPARC microprocessor

By: Blanck, G.; Krueger, S.;

1992 / IEEE / 0-8186-2655-0

Description

This item was taken from the IEEE Periodical ' The SuperSPARC microprocessor ' The SuperSPARC microprocessor is a highly integrated, high-performance superscalar SPARC version 8 compatible microprocessor. The authors provide an overview of its internal operation and capabilities. The processor contains an integer unit, a double precision floating point unit, fully consistent instruction and data caches, a SPARC reference memory management unit and a dual-mode bus interface supporting either the SPARC standard MBUS or an interface optimized for connection to a companion second-level cache controller chip. The chip is constructed using Texas Instruments 0.8- mu triple-layer metal BiCMOS technology.<>