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SUPREM 3.5, process modeling of gallium arsenide

By: Bravman, J.C.; Helms, C.R.; Stevenson, D.A.; Sigmon, T.W.; Dutton, R.W.; Plummer, J.D.; Chou, S.; Anholt, R.; Hansen, S.E.; Deal, M.D.;

1987 / IEEE

Description

This item was taken from the IEEE Periodical ' SUPREM 3.5, process modeling of gallium arsenide ' A computer program has been developed to simulate processes used to manufacture digital GaAs integrated circuits. The processes modeled in this first version of the simulator include ion implantation, diffusion, and activation, and the simulator includes a routine to calculate threshold voltage for a MESFET or JFET based on the simulated processing results and on substrate properties. Parameters for the models were derived from an extensive number of implantation and diffusion experiments, the major results of which are presented in this paper.