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Efficient Implementation of QR Decomposition for Gigabit MIMO-OFDM Systems
By: Zheng-Yu Huang; Pei-Yun Tsai;
2011 / IEEE
This item was taken from the IEEE Periodical ' Efficient Implementation of QR Decomposition for Gigabit MIMO-OFDM Systems ' This paper presents a VLSI architecture of QR decomposition for 4� MIMO-OFDM systems. A real-value decomposed MIMO system model is handled and thus the channel matrix to be processed is extended to the size of 8�. Instead of direct factorization, a QR decomposition scheme by cascading one complex-value and one real-value Givens rotation stages is proposed, which can save 44% hardware complexity. Besides, the requirement of skewed inputs in the conventional QR-decomposition systolic array is eliminated and 36% of delay elements are removed. The real-value Givens rotation stage is also constructed in a form of a stacked triangular systolic array to match with the throughput of the complex-value one. Hardware sharing is considered to enhance the utilization. The proposed design is implemented in 0.18-�m CMOS technology with 152K gates. From measurement, the maximum operating frequency is 100 MHz. It generates QR decomposition results every four clock cycles and accomplishes continuous projection every clock cycle to support MIMO detection up to 2.4 Gb/s. The measured power consumption is 318.6 mW and 219.6 mW for QR decomposition and projection, respectively, at the highest operating frequency. From the comparison, our proposed design achieves the highest throughput with high efficiency.
Cmos Integrated Circuits
Power 318.6 Mw
Gigabit Mimo-ofdm Systems
Real-value Decomposed Mimo System Model
Conventional Qr-decomposition Systolic Array
Real-value Givens Rotation Stage
Size 0.18 Mum
Frequency 100 Mhz
Power 219.6 Mw
Components, Circuits, Devices And Systems
Stacked Triangular Systolic Array