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An Area-Efficient 65 nm Radiation-Hard Dual-Modular Flip-Flop to Avoid Multiple Cell Upsets
2011 / IEEE
This item was taken from the IEEE Periodical ' An Area-Efficient 65 nm Radiation-Hard Dual-Modular Flip-Flop to Avoid Multiple Cell Upsets ' A layout structure to avoid upsets due to Multiple Cell Upsets (MCUs) is proposed for rad-hard dual-modular Flip-Flops (FFs) called BCDMR (Bistable Cross-coupled Dual-Modular Redundancy) by separating critical components. We have fabricated a 65 nm chip including 30 kbit dual-modular FF arrays on twin-well and triple-well structures. High-energy broad-spectrum neutron irradiations reveal that no soft error is observed up to 100 MHz in the twin-well, but some errors are observed in the triple well. The triple-well structure is sensitive to MCUs because the p-well potential can be easily elevated.
Size 65 Nm
Area-efficient Radiation-hard Dual-modular Flip-flop
Multiple Cell Upsets
Bistable Cross-coupled Dual-modular Redundancy
Dual-modular Flip-flop Arrays
High-energy Broad-spectrum Neutron Irradiations
Single Event Upset
65 Nm Bulk Cmos
Bi-stable Cross-coupled Dual-modular (bcdmr)
Built-in Soft-error Resilience (biser)
Dual-interlocked Storage Cell (dice)
Multiple Cell Upset (mcu)
Cmos Logic Circuits
Radiation Hardening (electronics)