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Submicrometer n/sup +/-Ge gate AlGaAs/GaAs MISFETs
By: Hirano, M.; Mizutani, T.; Maezawa, K.; Fujita, S.;
1989 / IEEE
This item was taken from the IEEE Periodical ' Submicrometer n/sup +/-Ge gate AlGaAs/GaAs MISFETs ' Submicrometer n/sup +/-Ge gate AlGaAs/GaAs MISFETs have been developed by designing a fabrication process for the n/sup +/-implanted region. The short-channel effect was sufficiently suppressed by lowering the ion-implantation energy down to 50 keV to achieve a standard deviation of threshold voltage as small as 13 mV for 0.5- mu m-gate FETs in a 2-in-diameter wafer. The source resistance was reduced by increasing the annealing temperature to 850 degrees C to obtain a transconductance of 500 mS/mm for a 0.5- mu m-gate FET. Even after annealing at such a high temperature, the quality of the channel layer was maintained at a sufficient level to realize a large cutoff frequency of 70 GHz for a 0.4- mu m-gate FET. A divide-by-four static frequency divider was also fabricated using the above-mentioned fabrication technology. Successful operation at 16 GHz at 300 K was obtained with a divider using 0.9- mu m-gate FETs at a low power dissipation of 36 mW per T-flip-flop.<
Field Effect Integrated Circuits
Insulated Gate Field Effect Transistors
Submicrometre N/sup +/-ge Gate
Channel Layer Quality
N/sup +/-implanted Region
Divide-by-four Static Frequency Divider
Engineered Materials, Dielectrics And Plasmas
Components, Circuits, Devices And Systems