Your Search Results

Use this resource - and many more! - in your textbook!

AcademicPub holds over eight million pieces of educational content for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!
Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

A flexible 128 channel silicon strip detector instrumentation integrated circuit with sparse data readout

By: Carithers, W.C., Jr.; Kleinfelder, S.A.; Spieler, H.G.; Kirsten, F.; Haber, C.; Ely, R.P., Jr.;

1988 / IEEE

Description

This item was taken from the IEEE Periodical ' A flexible 128 channel silicon strip detector instrumentation integrated circuit with sparse data readout ' A full-custom CMOS integrated circuit for silicon strip detector systems has been designed, fabricated, and tested. The circuit contains 128 parallel data-acquisition channels and considerable peripheral circuitry. Each channel consists of a low-noise, low-power, charge-sensitive amplifier, a multistage autobalanced comparator, an analog multiplexer, nearest-neighbor logic, priority-search logic, and a share of a position-encoding read-only memory. The analog system can substract both detector pedestal and leakage current on a channel-by-channel basis. A key feature of this design is the inclusion of on-chip sparse read-out circuitry, which allows efficient management of low-occupancy events. Designed for use at the Collider Detector Facility (CDF) at Fermilab, the circuit is suitable for large-scale silicon detector systems requiring a large, dense array of fast, low-power electronics.<>