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Edge-defined self-alignment of submicrometer overlaid devices
By: Leiss, J.E.; Bonifield, T.D.; Chatterjee, P.K.; Malhi, S.D.S.; Coleman, D.J.; Pinizzotto, R.F.; Carter, D.E.;
1984 / IEEE
This item was taken from the IEEE Periodical ' Edge-defined self-alignment of submicrometer overlaid devices ' A novel device structure for self-aligning the overlaid device in a stacked CMOS process is introduced and demonstrated. The structure allows submicrometer channel length devices to be fabricated without using advanced lithographic technology. The self-alignment feature should permit a dense layout for CMOS static RAM applications.