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Stacked CMOS SRAM cell

By: Malhi, S.D.S.; Lam, H.W.; Chen, C.-E.; Pinizzotto, R.F.;

1983 / IEEE

Description

This item was taken from the IEEE Periodical ' Stacked CMOS SRAM cell ' A static random access memory (SRAM) cell with cross-coupled stacked CMOS inverters is demonstrated for the first time. In this approach, CMOS inverters are fabricated with a laser recrystallized p-channel device stacked on top of and sharing the gate with a bulk n-channel device using a modified two-polysilicon n-MOS process. The memory cell has been exercised through the write and read cycles with external signal generators while the output is buffered by an on-chip, stacked-CMOS-inverter-based amplifier.