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Analog Viterbi Decoding for High Speed Digital Satellite Channels
By: Gilmore, R.; Acampora, A.;
1978 / IEEE
This item was taken from the IEEE Periodical ' Analog Viterbi Decoding for High Speed Digital Satellite Channels ' Analog means for implementing the Viterbi decoding algorithm at high data rates are presented. One approach employs sample-and-hold circuits and voltage adders to store and update the path metrics based upon maximum-likelihood decisions. Experimental results obtained from a breadboard realization of such a decoder are reported. An alternate approach employing tapped delay lines to store the analog channel waveform is also described. Analytical results pertaining to each implementation are presented.