Your Search Results

Use materials by this author in your textbook!

AcademicPub holds over eight million pieces of educational content such as case studies and journal articles for you to mix-and-match your way.

Experience the freedom of customizing your course pack with AcademicPub!

Not an educator but still interested in using this content? No problem! Visit our provider's page to contact the publisher and get permission directly.

Author: Sikorski, E.

Results

A 0.021 �m² trigate SRAM cell with aggressively scaled gate and contact pitch

2011 / IEEE / 978-1-4244-9949-6
By: Guillorn, M.A.; Chang, J.; Haensch, W.; Fuller, N.; Narayanan, V.; Sikorski, E.; Graham, W.; To, B.; Bucchignano, J.; Klaus, D.P.; Kratschmer, E.; Newbury, J.; Zhang, Z.; Lavoie, C.; Lauer, I.; Mauer, S.; Khater, M.; Bangsaruntip, S.; Brink, M.; Liu, F.; Majumdar, A.; Ott, J.A.; Bruce, R.; Pyzyna, A.; Engelmann, S.; Glodde, M.; Joseph, E.;

Very high performance 50 nm CMOS at low temperature

1999 / IEEE / 0-7803-5410-9
By: Wann, H.-J.; Bucchignano, J.J.; D'emic, C.; Kozlowski, P.; Zhang, Y.; Sikorski, E.; Viswanathan, R.G.; Roy, R.A.; Lee, K.-L.; Shi, L.; Wind, S.J.; Taur, Y.; Cai, J.;

Self-aligned n-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric and tungsten gate

2004 / IEEE
By: Babich, I.; D'Emic, C.; Kozlowski, P.; Kam-Leung Lee; Huiling Shang; Sikorski, E.; Guarini, K.; Haensch, W.; Wong, H.-S.P.; Meikei Ieong;

High-capacity, self-assembled metal-oxide-semiconductor decoupling capacitors

2004 / IEEE
By: Guarini, K.W.; Black, C.T.; Milkove, K.R.; Babich, I.V.; Sikorski, E.; Benedict, J.; Hyungjun Kim; Ying Zhang;

Dual work function metal gate CMOS using CVD metal electrodes

2004 / IEEE / 0-7803-8289-7
By: Nakamura, K.; Li, Y.; McFeely, F.R.; Callegari, A.; Narayanan, V.; Shahidi, G.; Ieong, M.; Jammy, R.; Wann, C.; Ng, H.; Duch, F.; Sikorski, E.; Jamison, P.; Lacey, D.; Kawano, Y.; Wajda, C.; Gribelyuk, M.; Cabral, C., Jr.; Milkove, K.; Nguyen, P.; Ku, V.; Steegen, A.; Cartier, E.; Zafar, S.;

Mobility and CMOS devices/circuits on sub-10nm [110] ultra thin body SOI

2005 / IEEE / 4-900784-00-1
By: Newbury, J.; Sikorski, E.; Shi, L.; Chan, K.; Kedzierski, J.; Ott, A.; Babich, K.; Chang, L.; Cai, J.; Sleight, J.; Topol, A.; Doris, B.; Rubino, J.; Huiling Shang; Meikei Ieong; Guarini, K.W.; Zhang, Y.; To, B.N.;

High performance FDSOI CMOS technology with metal gate and high-k

2005 / IEEE / 4-900784-00-1
By: Rubino, J.; Chang, L.; Narayanan, V.; Boyd, D.; Steen, M.; Linder, B.P.; Kim, Y.H.; Doris, B.; Leong, M.; Guarini, K.W.; Jammy, R.; Kozlowski, P.; D'Emic, C.; Carruthers, R.; Walker, J.F.; Newbury, J.; Kirsch, P.; Zhang, Y.; Babich, K.; Wong, L.; Shi, L.; Sikorski, E.; Topol, A.; Sleight, J.;

New polysilicon disposable sidewall process for sub-50 nm CMOS

2001 / IEEE / 2-914601-01-8
By: Lee, K.L.; Boyd, D.; Taur, Y.; Zhang, Y.; Yu, C.; Yoon, J.; Yang, Q.; Wind, S.; Surendra, M.; Sikorski, E.; Shi, L.; Roy, R.; Brancaccio, J.; Bucchignano, J.; Cai, J.; Chan, K.; Hanafi, H.; Kozlowski, P.; Miller, R.;

Poly-Si/AlN/HfSiO Stack for Ideal Threshold Voltage and Mobility in Sub-100 nm MOSFETs

2006 / IEEE / 1-4244-0005-8
By: Singco, G.; Narayanan, V.; Gribelyuk, M.; Flaitz, P.; Sikorski, E.; Newbury, J.; Kozlowski, P.; Jamison, P.; Steen, M.; Rubino, J.; Wang, X.; Bojarczuk, N.; Linder, B.; Cartier, E.; Paruchuri, V.; Frank, M.M.; Lee, K.L.; Ieong, M.; Jammy, R.; Oldiges, P.; Guha, S.; Zafar, S.;

Silicon on Insulator CMOS with Hybrid Crystal Orientation Using Double Wafer Bonding

2006 / IEEE / 0-7803-9748-7
By: Chan, K.K.; Yang, M.; Ieong, M.; D'Emic, C.; Meyer, R.; Scerbo, C.; Newbury, J.; Canaperi, D.; Medd, S.; To, B.; Graham, W.; Sikorski, E.; Zhang, Y.; Shi, L.; Kumar, A.; Ott, J.A.; Patel, J.; Schultz, R.; Kry, H.;

FinFET performance advantage at 22nm: An AC perspective

2008 / IEEE / 978-1-4244-1802-2
By: Guillorn, M.; Chang, J.; Haensch, W.; Kawasaki, H.; Yagishita, A.; Khater, M.; Neumeyer, D.; Pyzyna, A.; Yang, B.; Koli, D.; Tornello, J.; Lofaro, M.; To, B.; Graham, W.; Sikorski, E.; Zhang, Y.; Klaus, D.; Lavoie, C.; Yu, R.; Haran, B.; Bryant, A.; Fuller, N.; Dokumaci, O.; Wang, X.; Newbury, J.; Babich, K.; Ott, J.;

Demonstration of highly scaled FinFET SRAM cells with high-�/metal gate and investigation of characteristic variability for the 32 nm node and beyond

2008 / IEEE / 978-1-4244-2377-4
By: Kawasaki, H.; Ishimaru, K.; Haensch, W.; Takayanagi, M.; Yagishita, A.; Ouyang, Q.; Silverman, J.; Zhang, Y.; Viswanathan, R.; Miller, R.; Sikorski, E.; Kratschmer, E.; Klaus, D.; Ott, J.; Yang, Q.; Babich, K.; Muralidhar, R.; Chang, L.; Kanakasabapathy, S.; Chang, J.; Fuller, N.; Guillorn, M.; Khater, M.;

Trigate 6T SRAM scaling to 0.06 �m²

2009 / IEEE / 978-1-4244-5641-3
By: Guillorna, M.; Chang, J.; Haensch, W.; Zhang, Y.; Fuller, N.; Narayanan, V.; Carter, S.; Sikorski, E.; Lauer, I.; Graham, W.; To, B.; Bucchignano, J.; Kratschmer, E.; Klaus, D.; Wang, C.; Newbury, J.; Gignac, L.; Frank, M.; Lavoie, C.; Ott, J.; Darnon, M.; Bryant, A.; Lin, C.-H.; Pyzyna, A.; Engelmann, S.; Joseph, E.; Fletcher, B.; Cabral, C.;

Return To Top