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Author: Nishi, Y.

Results

Theory and Experiments of the Impact of Work-Function Variability on Threshold Voltage Variability in MOS Devices
2012 / IEEE
By: Grubbs, M.E.; Deal, M.; Hoffmann, T.; Ragnarsson, L.; Mitard, J.; Jing Li; Nishi, Y.; Xiao Zhang; Clemens, B.M.; Magyari-Kope, B.;
Effects of plasma exposure on defects in novel dielectric materials
2011 / IEEE / 978-1-61284-329-2
By: Shohet, J.L.; Nishi, Y.; Antonelli, G.A.; Jiang, G.; Nichols, M.T.; Ren, H.;
Separation of ion and photon damage effects on novel dielectric materials during plasma exposure
2011 / IEEE / 978-1-61284-329-2
By: Shohet, J.L.; Nishi, Y.; Antonelli, G.A.; Ren, H.;
High-efficiency Cu2O-based heterojunction solar cells fabricated on thermally oxidized copper sheets
2011 / IEEE / 978-1-4244-9965-6
By: Nishi, Y.; Minami, T.; Nomoto, J.; Miyata, T.;
Hot Forming to Improve Memory Window and Uniformity of Low-Power HfOx-Based RRAMs
2012 / IEEE / 978-1-4673-1081-9
By: Gilmer, D.C.; Young-Fisher, K.G.; Bersuker, G.; Butcher, B.; Kalantarian, A.; Kirsch, P.D.; Jammy, R.; Geer, R.; Nishi, Y.;
Asymmetry, Vacancy Engineering and Mechanism for Bipolar RRAM
2012 / IEEE / 978-1-4673-1081-9
By: Jammy, R.; Kirsch, P.D.; Nishi, Y.; Geer, R.; Butcher, B.; Kalantarian, A.; Jo, M.; Koveshnikov, S.; Bersuker, G.; Gilmer, D.C.;
Computational study toward micro electronics engineering
2012 / IEEE / 978-1-4673-0238-8
By: Park, S.G.; Shiraishi, K.; Yang, M.; Yamaguchi, K.; Kamiya, K.; Nishi, Y.; Niwa, M.; Magyari-Kope, B.; Shigeta, Y.;
Demonstration of Electroluminescence from Strained Ge Membrane LED
2012 / IEEE / 978-1-4577-1865-6
By: Donguk Nam; Saraswat, K.; Nishi, Y.; Brongersma, M.; Huang, K.C.; Szu-Lin Cheng; Sukhdeo, D.;
Low-Contact-Resistivity Nickel Germanide Contacts on n+Ge with Phosphorus/Antimony Co-Doping and Schottky Barrier Height Lowering
2012 / IEEE / 978-1-4577-1865-6
By: Maszara, W.P.; Shurong Liang; Gupta, S.; Roy, A.; Nishi, Y.; Lin, J.-Y.J.; Bin Yang; Saraswat, K.;
GeSn channel nMOSFETs: Material potential and technological outlook
2012 / IEEE / 978-1-4673-0847-2
By: Gunji, M.; Dekoster, J.; Lin, D.H.C.; Vincent, B.; Gupta, S.; Saraswat, K.C.; Nishi, Y.; Firrincieli, A.; Caymax, M.; Franquet, A.; Delmotte, J.; Douhard, B.; Yang, B.; Magyari-Kope, B.; Gencarelli, F.;
Gate-First Metal-Gate/High-$k$ n-MOSFETs With Deep Sub-nm Equivalent Oxide Thickness (0.58 nm) Fabricated With Sulfur-Implanted Schottky Source/Drain Using a Low-Temperature Process
2011 / IEEE
By: Kinoshita, A.; Nishi, Y.; Suzuki, M.;
Optimization of the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{GaSb}$ Interface and a High-Mobility GaSb pMOSFET
2011 / IEEE
By: Boos, J.B.; Bennett, B.R.; Ze Yuan; Irisawa, T.; Nainani, A.; Saraswat, K.C.; Nishi, Y.;
Microscopic model for the kinetics of the reset process in HfO2 RRAM
2013 / IEEE
By: Kalantarian, A.; Bersuker, G.; Butcher, B.; Gilmer, D.C.; Privitera, S.; Lombardo, S.; Geer, R.; Jammy, R.; Kirsch, P.; Nishi, Y.;
Effect of RESET Voltage on Distribution of SET Switching Time of Bipolar Resistive Switching in a Tantalum Oxide Thin Film
2015 / IEEE
By: Fleck, K.; Nishi, Y.; Menzel, S.; Waser, R.; Bottger, U.;
Multi-scale modeling of oxygen vacancies assisted charge transport in sub-stoichiometric TiOx for RRAM application
2014 / IEEE
By: Padovani, A.; Pirrotta, O.; Nishi, Y.; Magyari-Kope, B.; Zhao, L.; Larcher, L.;
Germanium on insulator (GOI) structure locally grown on silicon using hetero epitaxial lateral overgrowth
2013 / IEEE
By: Nam, J. H.; Saraswat, K. C.; Park, J.-H.; Nishi, Y.; Ito, T.; Shim, J.; Jung, W. S.;
A Combined Ab Initio and Experimental Study on the Nature of Conductive Filaments in Pt/ Hf O2/ Pt Resistive Random Access Memory
2014 / IEEE
By: Traore, B.; Xue, K.; Nishi, Y.; Magyari-Kope, B.; Blaise, P.; De Salvo, B.; Molas, G.; Vianello, E.; Fonseca, L.R.C.; Ghibaudo, G.;
The dependence of hot carrier degradation on AC stress waveforms
1988 / IEEE
By: Nishi, Y.; Fu, H.-s.; Cham, K.M.;
Simulation and measurement of picosecond step responses in VLSI interconnections
1988 / IEEE
By: Schreyer, T.A.; Nishi, Y.;
Multi-beam land mobile satellite communications experiments using ETS-V/VI
1990 / IEEE / 0-87942-632-2
By: Kondo, H.; Nishi, Y.; Komagata, H.;
Configuration and characteristics of NTT's mobile satellite communication system for the EMSS program
1988 / IEEE
By: Yasuda, Y.; Komagata, H.; Nishi, Y.;
VLSI/ULSI research methodology in the US and Japan
1991 / IEEE / 0-7803-0036-X
By: Nishi, Y.;
Latest advances in camcorder technology
1994 / IEEE
By: Katsumoto, T.; Shimada, K.; Urabe, T.; Shintani, K.; Nishi, Y.; Kubota, Y.;
ULSI technology toward the next century: driven by DRAMs or MPUs?
1992 / IEEE / 0-7803-0817-4
By: Nishi, Y.;
Lithium ion rechargeable batteries
1993 / IEEE / 0-7803-9970-6
By: Nishi, Y.; Nagamine, M.; Yamamoto, Y.; Kato, H.;
Perspective of silicon-based IC technology
1995 / IEEE / 0-7803-2624-5
By: Nishi, Y.;
The development of lithium ion secondary batteries
1996 / IEEE / 0-7803-3339-X
By: Nishi, Y.;
N-STAR mobile communications system
1996 / IEEE / 0-7803-3336-5
By: Furukawa, K.; Yasuda, Y.; Ueda, T.; Kondo, H.; Nishi, Y.;
Technology Trends And Opportunities For Giga-scale Integration
1997 / IEEE / 0-9651-5771-7
By: Nishi, Y.;
The development of lithium-ion secondary battery systems for EV and HEV
1998 / IEEE / 0-7803-4098-1
By: Horie, H.; Shigetomi, J.; Katayama, K.; Nishi, Y.;
An Integrated Failure Analysis Environment: An Experimental Model For Research And Development
1994 / IEEE
By: Cass, T.R.; Marcoux, P.; Phillips, B.; Nishi, Y.; Sau-Lan Ng; Hayes, D.M.; Clark, R.R.;
Ecological uses of tourmaline
1999 / IEEE / 0-7695-0007-2
By: Ishii, H.; Nakamura, T.; Matsumura, T.; Shigenobu, K.; Nishi, Y.;
Ecological alloy of Li-Al
1999 / IEEE / 0-7695-0007-2
By: Oguri, K.; Yamaguchi, Y.; Okada, T.; Mori, K.; Matsumura, T.; Yasuoka, T.; Mitsuzawa, S.; Nishi, Y.;
IC technology R&D for the next century
1999 / IEEE / 0-7803-5154-1
By: Nishi, Y.;
Impact of new materials, changes in physics and continued ULSI scaling on failure mechanisms and analysis
1999 / IEEE / 0-7803-5187-8
By: McPherson, J.W.; Nishi, Y.;
Simulation on phase change mark forming process and read out signal characteristics
2000 / IEEE / 0-7803-5950-X
By: Nishi, Y.; Kando, W.; Ushiyama, J.; Hirotsune, A.; Miyamoto, M.; Maeda, T.; Terao, M.;
Simulations of heat generation and conduction on a land/groove disc
2000 / IEEE / 0-7803-5950-X
By: Shimano, T.; Nishi, Y.; Kando, H.;
Limits of integrated-circuit manufacturing
2001 / IEEE
By: Nishi, Y.; Doering, R.;
Satellite mobile packet system characteristics and performance evaluation
2001 / IEEE / 0-7803-6728-6
By: Yamashita, T.; Nishi, Y.; Inoue, M.;
Prediction of the characteristics for high-speed recording of phase-change optical media
2002 / IEEE / 0-7803-7379-0
By: Terao, M.; Kando, I.; Shintani, T.; Nishi, Y.;
A 1024-bit MNOS RAM using avalanche-tunnel injection
1975 / IEEE
By: Tamaru, K.; Nishi, Y.; Nojima, I.; Konaka, M.; Saito, S.; Endo, N.; Uchida, Y.;
I/sup 2/L with a self-aligned double-diffused injector
1977 / IEEE
By: Nishi, Y.; Ito, S.; Shinozaki, S.; Nakai, M.; Tokumaru, Y.;
Film Properties of MoSi/sub 2/ and Their Application to Self-Aligned MoSi/sub 2/ Gate MOSFET
1980 / IEEE
By: Nishi, Y.; Kashiwagi, M.; Tsujimaru, T.; Mochizuki, T.;
Two-Dimensional Nature of Diffused Layers and Certain Limitations in Scaling-Down Coplanar Structure
1982 / IEEE
By: Maeda, S.; Konaka, M.; Taniguchi, K.; Iwai, H.; Nishi, Y.;
Experiment of telecom/broadcasting mission using a high-altitude solar-powered aerial vehicle Pathfinder Plus
2002 / IEEE / 0-7803-7442-8
By: Oodo, M.; Tsuji, H.; Suzuki, M.; Maruyama, M.; Miura, R.; Nishi, Y.;
A 1024-bit MNOS RAM using avalanche-tunnel injection
1975 / IEEE
By: Norio Endo; Uchida, Y.; Tamaru, K.; Nishi, Y.; Nojima, I.; Konaka, M.; Saito, S.;
I2L with self-aligned double-diffusion injector
1976 / IEEE
By: Ito, S.; Nakai, M.; Shinozaki, S.; Tokumaru, Y.; Nishi, Y.;
Technology roadmap and beyond
2003 / IEEE / 4-89114-040-2
By: Nishi, Y.;
Possibility of hydrogen generation using supercritical water
2003 / IEEE / 0-7803-8590-x
By: Nishi, Y.; Kambayashi, K.; Uchida, H.;
Characteristics of variable reluctance hybrid motor
2003 / IEEE / 0-7803-8352-4
By: Oguri, K.; Tesfaye, T.; Ochiai, Y.; Ogino, S.; Nishi, Y.;
Observation and modeling of the ice-covered ecosystem in the lagoon
2004 / IEEE / 0-7803-8669-8
By: Nishi, Y.; Tabeta, S.;
Experimental study of biaxial and uniaxial strain effects on carrier mobility in bulk and ultrathin-body SOI MOSFETs
2004 / IEEE / 0-7803-8684-1
By: Uchida, K.; Nishi, Y.; McIntyre, P.C.; McVittie, J.; Jagannathan, H.; Ching-Huang Lu; Zednik, R.;
Power optimization of future transistors and a resulting global comparison standard
2004 / IEEE / 0-7803-8684-1
By: Saraswat, K.C.; Nishi, Y.; Chao, A.K.; Shenoy, R.S.; Kapur, P.;
An atomic force microscope study of surface roughness of thin silicon films deposited on SiO/sub 2/
2005 / IEEE
By: Nasrullah, J.; Nishi, Y.; Tyler, G.L.;
Characteristics and mechanism of tunable work function gate electrodes using a bilayer metal structure on SiO/sub 2/ and HfO/sub 2/
2005 / IEEE
By: Colombo, L.; Wong, G.M.T.; Ching-Huang Lu; Nishi, Y.; Clemens, B.M.; Deal, M.D.; Chambers, J.J.; Visokay, M.R.; Chi On Chui; Majhi, P.; Tsai, W.;
Preparation of Sm-Fe giant magnetostrictive thin films by dc magnetron sputtering
2005 / IEEE / 0-7803-9009-1
By: Nishi, Y.; Tsukayama, Y.; Takahashi, K.; Masuda, S.; Kadowaki, A.; Matsumura, Y.;
Low defect ultra-thin fully strained-Ge MOSFET on relaxed Si with high mobility and low band-to-band-tunneling (BTBT)
2005 / IEEE / 4-900784-00-1
By: Nishi, Y.; Uchida, K.; Krivokapic, Z.; Krishnamohan, T.; Saraswat, K.C.;
Study of the inversion layer mobility and the improvement in gmof MOS-FET
1968 / IEEE
By: Tanaka, K.; Ohwada, A.; Nishi, Y.;
A stability improvement of current gain in silicon planar transistors
1969 / IEEE
By: Nishi, Y.; Ohwada, A.;
Study of the inversion layer mobility and the improvement in gmof MOSFET
1969 / IEEE
By: Ohwada, A.; Nishi, Y.; Tanaka, K.;
A novel mode of write operation utilizing avalanche-tunnel injection in MNOS memory transistor
1972 / IEEE
By: Tanaka, K.; Nojima, I.; Nishi, Y.; Uchida, Y.; Tamaru, K.;
A double-diffused MNOS transistor as a new non-volatile memory
1973 / IEEE
By: Nishi, Y.; Endo, N.;
Avalanche-tunnel injection in MNOS transistor
1977 / IEEE
By: Uchida, Y.; Endo, N.; Saito, S.; Nishi, Y.;
1 K-bit nonvolatile semiconductor read/write RAM
1978 / IEEE
By: Uchida, Y.; Saito, S.; Nakane, M.; Endo, N.; Matsuo, T.; Nishi, Y.;
Anomalous drain current in n-MOSFET's and its suppression by deep ion implantation
1978 / IEEE
By: Nihira, H.; Nishi, Y.; Iwai, H.; Konaka, M.;
Film properties of MoSi2and their application to self-aligned MoSi2gate MOSFET
1980 / IEEE
By: Mochizuki, T.; Tsujimaru, T.; Kashiwagi, M.; Nishi, Y.;
Two dimensional nature of diffused line capacitance in coplanar MOS structures
1980 / IEEE
By: Maeda, S.; Konaka, M.; Taniguchi, K.; Iwai, H.; Nishi, Y.;
Two-dimensional nature of diffused layers and certain limitations in scaling-down coplanar structure
1982 / IEEE
By: Iwai, H.; Taniguchi, K.; Konaka, M.; Maeda, S.; Nishi, Y.;
A method to reduce the peak current density in a via
1987 / IEEE
By: Keunmyung Lee; Nishi, Y.; Varon, M.; Voorde, P.V.;
Experiments on IMT-2000 using unmanned solar powered aircraft at an altitude of 20 km
2005 / IEEE
By: Maruyama, M.; Miura, R.; Tsuji, H.; Oodo, M.; Sasamoto, H.; Nishi, Y.; Suzuki, M.;
Incorporation of supply voltage and process variations in the power optimization for future transistors
2005 / IEEE / 0-7803-9040-7
By: Saraswat, K.C.; Nishi, Y.; Shenoy, R.S.; Kapur, P.; Chao, A.K.;
Edge-defined 90nm TFTs with adjustable V/sub T/ in a 3-D compatible process
2005 / IEEE / 0-7803-9212-4
By: Leonard Tyler, G.; Burr, J.B.; Nasrullah, J.; Nishi, Y.;
Preface
2004 / IEEE / 0-7803-8423-7
By: Nishi, Y.;
The present and the future of nanoelectronics
2004 / IEEE / 0-7803-8423-7
By: Nishi, Y.;
50-GHz Bandpass Filter for OADM with Low Chromatic Dispersion
2002 / IEEE / 87-90974-63-8
By: Minagawa, K.; Nishi, Y.; Iida, Y.; Abe, H.; Mizuno, K.; Nanri, N.; Ito, T.;
Physical mechanisms of electron mobility enhancement in uniaxial stressed MOSFETs and impact of uniaxial stress engineering in ballistic regime
2005 / IEEE / 0-7803-9268-X
By: Saraswat, K.C.; Krishnamohan, T.; Uchida, K.; Nishi, Y.;
Fabrication and characterization of CMOSFETs on porous silicon for novel device layer transfer
2005 / IEEE / 0-7803-9268-X
By: Nishi, Y.; Yonehara, T.; Yamagata, K.; Koto, M.; McVittie, J.; Sanda, H.;
New constraint for Vth optimization for sub 32nm node CMOS gates scaling
2005 / IEEE / 0-7803-9268-X
By: Kapur, P.; Morifuji, E.; Nishi, Y.; Kuo-An Chao, A.;
High-mobility ultrathin strained Ge MOSFETs on bulk and SOI with low band-to-band tunneling leakage: experiments
2006 / IEEE
By: Krishnamohan, T.; Saraswat, K.C.; Nishi, Y.; Uchida, K.; Krivokapic, Z.;
High-mobility low band-to-band-tunneling strained-Germanium double-gate heterostructure FETs: Simulations
2006 / IEEE
By: Krishnamohan, T.; Donghyun Kim; Saraswat, K.C.; Jungemann, C.; Nishi, Y.; Chi Dong Nguyen;
Charge Trapping in High-$k$Gate Stacks Due to the Bilayer Structure Itself
2006 / IEEE
By: Jameson, J.R.; Griffin, P.B.; Plummer, J.D.; Nishi, Y.;
An analytical propagation delay model with power supply noise effects
2006 / IEEE / 0-7803-9389-9
By: Mukund, P.R.; Washburn, C.; Pude, M.; Nishi, Y.; Abe, K.;
Strained-Si, Relaxed-Ge or Strained-(Si)Ge for Future Nanoscale p-MOSFETs?
2006 / IEEE / 1-4244-0005-8
By: Nishi, Y.; Jungemann, C.; Donghyun Kim; Krishnamohan, T.; Saraswat, K.C.;
Resistive Switching Mechanism in $\hbox{Zn}_{x}\hbox{Cd}_{1 - x}\hbox{S}$ Nonvolatile Memory Devices
2007 / IEEE
By: Zheng Wang; Nishi, Y.; McIntyre, P.C.; Simon Wong; McVittie, J.; Griffin, P.B.;
Silicon-based photonic crystal nanocavity light emitters
2006 / IEEE / 0-7803-9556-5
By: Sanda, H.; Vuckovic, J.; Makarova, M.; Nishi, Y.;
Band to Band Tunneling limited Off state Current in Ultra-thin Body Double Gate FETs with High Mobility Materials : III-V, Ge and strained Si/Ge
2006 / IEEE / 1-4244-0404-5
By: Kim, D.; Saraswat, K.C.; Nishi, Y.; Krishnamohan, T.;
Power Optimization for SRAM and Its Scaling
2007 / IEEE
By: Horowitz, M.; Patil, D.; Morifuji, E.; Nishi, Y.;
Nonvolatile SRAM Cell
2006 / IEEE / 1-4244-0438-X
By: Fujita, S.; Tze Wee Chen; Gibby, A.; Zheng Wang; Griffin, P.; Wei Wang; Wong, S.; Nishi, Y.;
Theoretical Investigation Of Performance In Uniaxially- and Biaxially-Strained Si, SiGe and Ge Double-Gate p-MOSFETs
2006 / IEEE / 1-4244-0438-X
By: Saraswat, K.; Nishi, Y.; Wong, P.; Selberherr, S.; Krishnamohan, T.; Donghyun Kim; Jungemann, C.; Ungersboeck, E.;
Comprehensive Study on Injection Velocity Enhancement in Dopant-Segregated Schottky MOSFETs
2006 / IEEE / 1-4244-0438-X
By: Toriyama, S.; Uchida, K.; Nishi, Y.; Kinoshita, T.; Kinoshita, A.; Koga, J.; Hasumi, R.;
Monolithic 3D Integrated Circuits
2007 / IEEE / 1-4244-0584-X
By: El-Gamal, A.; Wong, S.; Plummer, J.; Pease, F.; Nishi, Y.; Griffin, P.;
Electro-Thermally Coupled Power Optimization for Future Transistors and Its Applications
2007 / IEEE
By: Kapur, P.; Kuo-An Chao, A.; Nishi, Y.; Saraswat, K.; Morifuji, E.;
An Analytical Compact Circuit Model for Nanowire FET
2007 / IEEE
By: Lee, T.H.; Okajima, M.; Fujita, S.; Ryan Tu; Paul, B.C.; Nishi, Y.;
Source/Drain Technology for Nanoscale MIS Field Effect Devices
2007 / IEEE / 1-4244-1103-3
By: Nishi, Y.;
Impact of a Process Variation on Nanowire and Nanotube Device Performance
2007 / IEEE
By: Lee, T.H.; Okajima, M.; Fujita, S.; Paul, B.C.; Nishi, Y.; Wong, H.-S.P.;
An Integrated Phase Change Memory Cell With Ge Nanowire Diode For Cross-Point Memory
2007 / IEEE / 978-4-900784-03-1
By: Nishi, Y.; Chidsey, C.E.D.; Ratchford, J.B.; Jagannathan, H.; Wong, H.-S.P.; SangBum Kim; Yuan Zhang; McVittie, J.P.;
R-1: Navigating the Roadmap to 32nm and Beyond: Breaking the Barriers
2007 / IEEE / 978-4-900784-03-1
By: Skotnicki, T.; Patton, G.; Arghavani, R.; Inaba, S.; Liang, M.; Chau, R.; Nishi, Y.; Toyoshima, Y.;
Process Integration and Electrical Properties of Bilayer Metal Gate/High-k MOSFETs
2007 / IEEE / 978-1-4244-1101-6
By: Ching-Huang Lu; Nishi, Y.; Clemens, B.M.; Deal, M.; Wong, G.M.T.;
Electro-Thermally Coupled Power Optimization for Future Transistors
2007 / IEEE / 978-1-4244-1101-6
By: Chao, A.K.; Nishi, Y.; Saraswat, K.C.; Morifuji, E.; Kapur, P.;
Novel Cross Point Switch based on Zn1-x CdxS memory devices for FPGA
2007 / IEEE / 978-1-4244-1101-6
By: Fujita, S.; Zheng Wang; Abe, K.; Nishi, Y.; Lee, T.H.;

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