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Author: Ken Rim

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3D stackable 32nm High-K/Metal Gate SOI embedded DRAM prototype
2011 / IEEE / 978-1-61284-175-5
By: Bishan He; Fainstein, D.; Safran, J.; Golz, J.; Iyer, S.; Ken Rim; Kirihata, T.; Robson, N.; Barth, J.; Leu, D.; Kothandaraman, C.; Maier, G.; Himmel, B.; Cestero, A.; Yan Sun; Vehabovic, A.; Weaver, T.; Ming Yin;
Scaling beyond conventional CMOS device
2004 / IEEE / 0-7803-8511-X
By: Dons, B.; Meikei Ieong; Huiling Shang; Min Yang; Ken Rim; Zhibin Ren; Kedzierski, J.;
Strain for CMOS performance improvement
2005 / IEEE / 0-7803-9023-7
By: Ken Rim; Chan, V.; Qiqing; Min Yang; Young Way Teh; Rajeev Malik; Sam Yang; Meikei Ieong;
An integrated methodology for accurate extraction of S/D series resistance components in nanoscale MOSFETs
2005 / IEEE / 0-7803-9268-X
By: Ken Rim; Narasimha, S.; Seong-Dong Kim;
Strained Si Channel MOSFETs with Embedded Silicon Carbon Formed by Solid Phase Epitaxy
2007 / IEEE / 978-4-900784-03-1
By: Chan, K.; Lavoie, C.; Dyer, T.; Byeong Kim; Chakravarti, A.; Ozcan, A.; Madan, A.; Jinghong Li; Gluschenkov, O.; Yaocheng Liu; Ken Rim; Henson, W.; Loesing, R.; Zhijiong Luo; Rovedo, N.; Pinto, T.; Popova, I.;
SOI CMOS Technology with 360GHz fT NFET, 260GHz fT PFET, and Record Circuit Performance for Millimeter-Wave Digital and Analog System-on-Chip Applications
2007 / IEEE / 978-4-900784-03-1
By: Pekarik, J.; Springer, S.; Fried, D.; Williams, R.; Wagner, L.; Zamdmer, N.; Ken Rim; Dufrene, B.; Johnson, J.; Choongyeun Cho; Jagannathan, B.; Daeik Kim; Jonghae Kim; Sungjae Lee; Freeman, G.; Plouchart, J.-O.;
On the difference of temperature dependence of metal gate and poly gate SOI MOSFET threshold voltages
2008 / IEEE / 978-1-4244-2377-4
By: Shu-Jen Han; Ken Rim; Myung-Hee Na; Dechao Guo; Chang, P.; Xinlin Wang;
Reverse Temperature Dependence of Circuit Performance in High- $\kappa$/Metal-Gate Technology
2009 / IEEE
By: Shu-Jen Han; Dechao Guo; Xinlin Wang; Mocuta, A.C.; Henson, W.K.; Ken Rim;

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