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Author: Chun-Yung Sung

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The ultimate switch

2012 / IEEE
By: Ji Ung Lee; Chun-Yung Sung;

Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates

2005 / IEEE / 4-900784-00-1
By: Klymko, N.; Wildman, H.; Rovedo, N.; Fischetti, M.; Jinghong Li; Utomo, H.; Huajie Chen; Panda, S.; Holt, J.; Min Yang; Qiqing Ouyang; Chun-Yung Sung; Meikei Ieong; Ott, J.A.; Bryant, A.; Fried, D.M.; Costrini, G.; Kanarsky, T.;

High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates

2005 / IEEE / 0-7803-9268-X
By: Saenger, K.L.; Pfeiffer, G.; Ng, H.Y.; Haizhou Yin; Chun-Yung Sung; Wann, C.H.; Zhibin Ren; Rong Zhang; de Souza, J.P.; Sadana, D.; Rovedo, N.; Raccioppo, M.; Chan, V.; Nguyen, P.Y.; Mo, R.T.; Madan, A.; Zhijiong Luo; Lee, H.K.; Ku, V.; Kempisty, J.J.; Bendernagel, R.; Ott, J.A.; Jinghong Li; Crowder, S.W.;

Novel Approach to Reduce Source/Drain Series and Contact Resistance in High-Performance UTSOI CMOS Devices Using Selective Electrodeless CoWP or CoB Process

2007 / IEEE
By: Shao, I.; Topol, A.; Pan, J.; Ming-Ren Lin; Iacoponi, J.; Chun-Yung Sung;

Low-k spacers for advanced low power CMOS devices with reduced parasitic capacitances

2008 / IEEE / 978-1-4244-1954-8
By: Fuller, N.; Ouyang, C.; Xinlin Wang; Huiming Bu; Joseph, E.; Huang, E.; Shahidi, G.; Purushothaman, S.; Chun-Yung Sung; Haensch, W.; Sunfei Fang; Lauer, I.; Mallikarjunan, A.; Tien Cheng; Shobha, H.; Simonyi, E.;

Development of graphene FETs for high frequency electronics

2009 / IEEE / 978-1-4244-5641-3
By: Farmer, D.; Jenkins, K.; Yu-Ming Lin; Ek, B.; Valdes-Garcia, A.; Hsin-Ying Chiu; Chun-Yung Sung; Avouris, P.;

Post Si CMOS graphene nanoelectronics

2011 / IEEE / 978-1-4244-8492-8
By: Chun-Yung Sung;

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